About the founder

VLSI Concepts was founded in 1995 by Dr. Edward L. Hepler

Dr. Hepler began his career as a Member of Technical Staff in the Processor Design laboratory of Bell Laboratories where he helped design high reliability processors used in electronic switching systems. From there he moved to the Space Systems Division of General Electric and then to Commodore Business Machines where he developed chips for next generation Amiga machines. ...


The V65C32 is a synthesizable VHDL (soft) core design which is object code compatible with MOS Technologies's (and others') popular 8-bit 65C02 microprocessor, but adds modes that allows it to operate on 16 and 32 bit operands. The V65C32 is intended to be used in system-on-a-chip applications constructed using gate-arrays or standard cells. It should be especially interesting to designers who currently use 65C02s in embedded control applications and want to integrate its functionality with other designs/peripherals/etc. onto a single chip (ASIC) while adding additional data manipulation functionality.

The V65C32 is a fully synchronous design and contains no microcode; all control is implemented via state machines. It is written in synthesizable VHDL using IEEE standard libraries. It uses a single clock.

The V65C32 also contains debug assist hardware to provide "ICE"-like debugging access. This hardware is intended to be accessed through a JTAG port (a JTAG interface is also available).

The design kit includes the synthesizable VHDL model, a sample synthesis script, a sample constraint file, a VHDL test bench, and test stimulus files.

VLSI Concepts can provide customization of the design, if requested.

Design and integration assistance is also available from VLSI Concepts.


  1. Object code compatible with 65C02
  2. Fully synchronous design
  3. Added operating modes for 16 and 32 bit operands
  4. No microcode; All control via state machines
  5. On-Chip Debug assist hardware included in design
  6. "ICE"-like functions via JTAG access port
  7. Customize the design to your needs
  8. Written in synthesizable VHDL - no microcode

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